Guest Editorial Computing in Emerging Technologies (Second Issue)

I N THE quest of a potential alternative to CMOS at the end of its roadmap, multitude of research efforts have been directed towards investigating novel devices with unique characteristics. These emerging devices hold tremendous potential in achieving higher integration density (in the order of devices/cm), higher performance, and increased energy efficiency for computation. On the other hand, these devices also brings in interesting challenges to logic design, for example, difficulty to construct a cascaded irregular logic structure. The dense and periodic structures as well as bi-stable nature of many nanodevices make them amenable to large high-density memory array design. Moreover, self-assembly of many nanostructures is efficient for a bottom-up system design flow, thus making them suitable for building reconfigurable computing paradigms. These tectonic shifts in device technology impact the design and test of integrated systems in profound ways. Transforming these nanodevices into nanocomputing framework may require nontraditional computing model as well as circuit/archi-tecture level design approaches. Along with using nanodevices as " better switches " in existing " switch based " implementations of logic functions, it is equally important to explore different approaches to fully exploit the benefits of nanodevices while mitigating some of the major shortcomings, such as high defect rate and lack of gain. Since many nanodevices need to be interfaced with CMOS switches, a well-designed nanoscale memory structure needs to substantially reduce the CMOS overhead per memory cell. Moreover, memory structures realized using nan-odevices should have very well-defined CMOS interfaces to facilitate CMOS-nano hybridization. A reconfigurable computing architecture is promising for many devices since it facilitates mapping arbitrary applications in a generic periodic fabric using bottom-up manufacturing. Furthermore, a transition into the beyond -CMOS era is expected to drive large shift in the design of secure systems. First, the properties of emerging nanoscale devices (e.g., large variations, power/timing asymmetry, and non-volatility) could lead to new attack modalities. Second, new defense mechanisms (e.g., new design for security primitives) may be enabled by the unique characteristics of nanoscale devices. This special issue focuses on circuit, architecture, and system aspects of computing in beyond-CMOS electronics. We received a large number of submissions (56) on circuit, architecture , and computing models for both charge and noncharge based emerging technologies. The papers were contributed by researchers from both academia as well as industry. Given the extremely large number of high-quality submissions that were received, it was decided to devote two consecutive …